---: RESET
---: Clocks inited
---: InitDRAM
---: Memory inited
---: Changing DQ values for Tatung
---: Changing A values for Tatung
---: InitTLB

---: InitCache
---: Test RAM
---: Testing DWords uncached
---: Testing Halflings Uncached
---: Testing Bytes Uncached
---: Testing DWords Cached
---: Testing Halflings Cached
---: Testing Bytes Cached
---: Testing Address Lines
---: Testing Address Lines
---: Test DWords for the IPL, low mem
---: Test DWords for the IPL, hi mem
---: ROM based memory tests completed
---: Copying IPL image to RAM
---: Jumping into RAM

---: Executing in RAM

---: RAM TEST MODE - RAM WILL BE TESTED CONTINUOUSLY

---: Testing all DWords uncached with 00000000
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---: Testing all DWords uncached with ffffffff
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---: Testing all DWords uncached with 55555555
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---: Testing all DWords uncached with AAAAAAAA
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---: Testing all HWords uncached with 0000
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---: Testing all HWords uncached with ffff
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---: Testing all HWords uncached with 5555
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---: Testing all HWords uncached with AAAA
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---: Testing all Bytes uncached with 00
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---: Testing all Bytes uncached with ff
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---: Testing all Bytes uncached with 55
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---: Testing all Bytes uncached with AA
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---: Testing Address Lines Dword uncached
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---: Testing Address Lines HWord uncached
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---: Testing Address Lines BYTE uncached
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---: Testing all DWords cached with 00000000
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---: Testing all DWords cached with ffffffff
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---: Testing all DWords cached with 55555555
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---: Testing all DWords cached with AAAAAAAA
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---: Testing all HWords cached with 0000
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---: Testing all HWords cached with ffff
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---: Testing all HWords cached with 5555
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---: Testing all HWords cached with AAAA
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---: Testing all Bytes cached with 00
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---: Testing all Bytes cached with ff
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---: Testing all Bytes cached with 55
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---: Testing all Bytes cached with AA
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---: Testing Address Lines Dword cached
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---: Testing Address Lines HWord cached
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---: Testing Address Lines BYTE cached
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